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| E2E1035-27-Y2 Semiconductor Semiconductor MSM6636B This version:MSM6636B Jan. 1998 Previous version: Nov. 1996 SAE-J1850 Multiplex Communication Protocol Conformity Transmission Controller for Automotive LAN GENERAL DESCRIPTION The MSM6636B is a transmission controller for automotive LAN based on data communication protocol SAE-J1850. This device can realize a data bus topology bus LAN system with a PWM bit encoding method (41.6 kbps). In addition to a protocol control circuit, MSM6636B has an enclosed quartz oscillation circuit, host CPU interface (parallel interface), a transmit/receive buffer, and a bus receiver circuit that decreases the burden on the host CPU. FEATURES * Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued August 12, 1991) * Non-destructive collision and priority control using CSMA/CD * Internal transmit buffer (1 frame) and receive buffer (2 frames) * Modulating/demodulating: PWM (Pulse Width Modulation) * Transmission speed: 41.6 kbps * Multi-address setting with physical addressing: 1 type / functional addressing: 15 types * Address filter function by multi-addressing (broadcasting possible) * Automatic retransmission function by arbitration loss and non ACK * Three types of in-frame response support: q Single-byte response from a single node w Multi-byte response from a single node (with CRC code) e Single-byte response from multiple nodes (ID response as ACK) * Error detection by cyclic redundancy check (CRC) * Various communication error detections * Dual-wire bus abnormality detection by internal bus receiver and fault tolerance function * Host CPU interface is accessed in parallel * Sleep function Low current consumption mode by oscillation stop (IDS Max < 50A) SLEEP / WAKE UP control from host CPU, WAKE UP via LAN bus * Package: 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name : MSM6636BGS-K) 1/13 Semiconductor MSM6636B BLOCK DIAGRAM LAN Bus Input Buffer Register Receive Register Parallel Interface LAN Controller S-P Converter CRC Checker PWM Decoder Degital Filter Bus Receiver Receive Buffer Address Register Address Filter Receive Controller CPU Status Register Transmission Register CRC Generator P-S Converter Transmission Controller Response Register x'tal Clock Generator PWM Encoder LAN Bus Output MSM6636B 2/13 Semiconductor MSM6636B PIN CONFIGURATION (TOP VIEW) WR RD ALE INT RES AVDD BO- BI- BI+ BO+ AGND DGND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 DVDD AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 CS OSC0 OSC1 24-Pin Plastic SOP PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16-23 24 Symbol WR RD ALE INT RES AVDD BO- BI- BI+ BO+ AGND DGND OSC1 OSC0 CS AD0-7 DVDD Type I I I O I -- O I I O -- -- O I I I/O -- Data write enable input pin Data read enable input pin Address latch input pin Interrupt output pin Reset input pin Analog power supply voltage LAN--BUS output - LAN--BUS input - LAN--BUS input + LAN--BUS output + Analog ground pin Digital ground pin Crystal (or ceramic resonator) oscillation output Crystal (or ceramic resonator) oscillaiton input Chip select input pin Address input/data input-output pin Digital power supply voltage Description 3/13 Semiconductor MSM6636B ABSOLUTE MAXIMUM RATINGS DGND=AGND=0V Parameter Power Supply Voltage Input Voltage Output Voltage Power Dissipation Storage Temperature Symbol DVDD, AVDD VI VO PD(SOP)*1 TSTG Condition -- AVDD=DVDD AVDD=DVDD Ta=25C -- Rating -0.3 to +7.0 -0.3 to DVDD+0.3 -0.3 to DVDD+0.3 780 -55 to +150 Unit V V V mW C *1 24-pin SOP package power dissipation Power Dissipation Curve < 24-pin SOP package> Power dissipation PD(SOP) [mW] 1000 780 500 -40 25 125 150 Ambient temperature Ta (C) 4/13 Semiconductor MSM6636B RECOMMENDED OPERATING CONDITIONS DGND=AGND=0V Parameter Power Supply Voltage Operating Frequency Ambient Temperature Symbol DVDD, AVDD fOSC Ta Condition AVDD=DVDD DVDD=AVDD=5V10% Range 4.5 to 5.5 2 to 16 -40 to +85 Unit V MHz C -- ELECTRICAL CHARACTERISTICS DC Characteristics DVDD=AVDD=5V10%, DGND=AGND=0V, Ta=-40 to +85C Applied pin (see below Condition Unit Min. Typ. Max. for A-E) -- A DVDD 0.8 -- DVDD+0.3 V -- -- -- -- -- -- VI=VDD VI=0V VI=VDD VI=0V VI=VDD VI=0V IO=-400A IO=+3.2mA IO=-4.0mA IO=+4.0mA -- During sleep f=16MHz, no load A E E B B E B B RES RES BI (+) BI (-) C, AD0-7 C, AD0-7 D D -- -- -- DGND-0.3 DVDD 0.7 DGND-1.0 2.4 -0.3 100 -- -- -- -- -- -- DVDD-0.4 -- DVDD-0.4 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- *1 -- DVDD 0.2 DVDD+1.0 DVDD+0.3 0.8 400 +1 -1 +1 -100 +100 -100 -- DGND+0.4 -- DGND+0.4 1 50 10 V V V V V mV mA mA mA mA mA mA V V V V V mA mA Parameter "H" Input Voltage "L" Input Voltage "H" Input Voltage "L" Input Voltage "H" Input Voltage "L" Input Voltage Receiver Hysteresis Width "H" Input Current "L" Input Current "H" Input Current "L" Input Current "H" Input Current "L" Input Current "H" Output Voltage "L" Output Voltage "H" Output Voltage "L" Output Voltage GND Offset Voltage Current Consumption 1 Current Consumption 2 Symbol VIH1 VIL1 VIH2 VIL2 VIH3 VIL3 VH IIH1 IIL1 IIH2 IIL2 IIH3 IIL3 VOH1 VOL1 VOH2 VOL2 VOFF IDS IDD -- DGND 0.3 A: RES, CS B: ALE, WR, RD, AD0-7 C: INT D: BO-, BO+ E: BI-, BI+ *1 Typ.=0.2mA when VDD=5V, f=16 MHz, Ta=25C 5/13 Semiconductor AC Chacteristics * PWM bit timing MSM6636B DVDD=AVDD=5V10%, Ta=-40 to +85C, In setting 41.6 kbps Parameter Bit Length "1" Dominant Width "0" Dominant Width "SOF" Dominant Width "SOF, BRK" Length "BRK" Dominant Width "EOD" + Bit Length "EOF" + Bit Length "EOF + IFS" " + Bit Length "0" Passive Width Symbol TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 Transmit min 23.64 6.90 14.87 30.54 47.28 38.42 47.28 70.92 94.56 8.86 typ 24.00 7.00 15.00 31.00 48.00 39.00 48.00 72.00 96.00 9.00 max 24.36 7.11 15.23 31.47 48.72 39.59 48.72 -- -- 9.14 Receive min 21.00 5.00 13.00 29.00 45.00 37.00 43.00 69.00 86.00 4.00 max 28.00 12.00 20.00 36.00 52.00 44.00 51.00 76.00 -- 15.00 Unit ms ms ms ms ms ms ms ms ms ms Note: The sending timing in the above table does not include the delay of the bus drivers. Dominant "1" Passive Dominant "0 " Passive TP3 TP1 TP10 Dominant " SOF " Passive TP4 TP5 TP2 Dominant " EOD " Passive LAST BIT TP7 " EOF " " IFS " Dominant Passive LAST BIT TP8 TP9 Dominant " BRK " Passive TP6 TP5 EOF IFS EOD 6/13 Semiconductor * CPU parallel interface timing MSM6636B DVDD=AVDD=5V10%, Ta=-40 to +85C Parameter ALE Pulse Width Address Setup Time Address Hold Time CS Setup Time RD Setup Time Continuous Read Cycle Time RD Output Enable Delay Time RD Output Floating Delay Time RD Pulse Width RD Hold Time at Read WR Setup Time Continuous Write Cycle Time WR Pulse Width Data Setup Time Data Hold Time CS Hold Time at Write Symbol tAW tAS tAH tCSS tRDS tRDCY tRD tRDH tRDW tRCSH tWRS tWRCY tWRW tDS tDH tWCSH CL=50pF Measuring condition Min. 65 65 5 50 20 160 -- -- 75 0 100 160 75 100 40 50 Max. -- -- -- -- -- -- 70 50 -- -- -- -- -- -- -- -- ns Unit 7/13 Semiconductor Parallel Interface Timing tAW MSM6636B ALE tAS tAH tRDS AD0-7 tCSS Address tRD Data Output tRDH CS tRDW tRCSH RD Read Timing ALE tWRS AD0-7 Address Data Input tDS tDH CS tWRW tWCSH WR Write Timing 8/13 Semiconductor Timing When Automatic Address Increment is Used MSM6636B ALE tRDS AD0-7 Address Data Output Data Output Data Output CS RD tRD tRDCY tRDW tRDH Read Timing ALE tWRS AD0-7 Address Data Input tDS tDH Data Input Data Input CS WR tWRCY tWRW Write Timing 9/13 Semiconductor * Wakeup input signal MSM6636B DVDD=AVDD=5V10%, Ta=-40 to +85C Parameter LAN bus Passive AE Dominant Change Pulse Width RXD Terminal Input Pulse Width Bus Receiver Stable Time *1 Symbol tWD tWR tRS Min. 7 400 1 Typ. -- -- -- Max. -- -- -- Unit ms ns ms *1 The stable time of the bus receiver is from just after wakeup to the restart of message transmission and reception. However, the clock oscillation source should use an external clock. (A clock is input even in the sleep status.) tWD BI+ BI- RXD tWR tWD tWD Note: The time chart shows the wakeup input signals from each sleep status. 10/13 Semiconductor * Fault tolerant function operation conditions MSM6636B DVDD=AVDD=5V10%, Ta=-40 to +85C, In setting 41.6 kbps Parameter LAN bus (+) GND Short Circuit Detection Pulse Width LAN bus (+) VDD Short Circuit Detection Pulse Width LAN bus (-) GND Short Circuit Detection Pulse Width LAN bus (-) VDD Short Circuit Detection Pulse Width Symbol tPG tPV tNG tNV Min. 5 48 48 5 Typ. -- -- -- -- Max. -- -- -- -- Unit ms ms ms ms BUS(+) BUS(-) tPG BUS(+) BUS(-) tNV tNG tPV * Reset input pulse width DVDD=AVDD=5V10%, Ta=-40 to +85C Parameter Reset Input Pulse Width Symbol tRES Min. 0.1 Typ. -- Max. -- Unit ms RES tRES Note: The oscillation stable time after power ON is determined by the crystal used and the parasitic capacitance generated by connection. Make tRES greater than or equal to the oscillation stable time. In the table above, the reset input pulse width indicates the minimum pulse width when oscillation is stable after power is turned on. 11/13 Semiconductor MSM6636B APPLICATION CIRCUIT Host CPU and J1850 Line Bus Connection Example Unit A Host CPU AD0-7 ALE RD WR PXX INT CLKOUT RES MSM6636B DVDD AVDD AD0-7 ALE RD WR CS INT OSC0 C *1 BI (-) BO (-) RR RB RS ZD ZD BO (+) BI (+) RB RR RS OPEN OSC1 RES DGND AGND Unit B RP . . . RD Bus + Bus - An optimum system can be constructed by selecting an optimum host CPU and combining it with the MSM6636B. *1 Insert a capacitor between the power supply and GND to prevent supply noise. It is recommended to connect a small-capacitance bypass capacitor and a large-capacitance filter capacitor serially. The typical capacitors are as follows: 0.01 to 0.22 mF : Ceramic capacitor 10 to 100 mF : Tantalum capacitor 12/13 Semiconductor MSM6636B PACKAGE DIMENSIONS (Unit : mm) SOP24-P-430-1.27-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.58 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 13/13 |
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